Chip testing process of the wafer test and method

[kaikaixinxin]

Electronic chip in the electronics industry has been in the absolute core position, and each year with extremely rapid development trend of renewal, each time a chip from design to production need to go through hundreds of tests,wafer test from the basic performance to the quality of the package have strict requirements, then today we will introduce the various stages of the chip test process.

Chip wafer testing

Wafer Acceptance Test (Wafer Acceptance Test), also known as WAT (Wafer Acceptance Test) or PCM (Process Control Monitor), wafer level testing is the testkey into the scribe slot, through the test probe attached to the test pad for testing.

This stage of the test is in the Fab process design process, that is, through the above Fab production development of this stage, is divided into the system front-end (metal for interconnect technology before) and back-end (packaging themselves before), the front-end of some of the enterprise's basic functional device structure parameters such as threshold control voltage on-resistance, source-drain breakdown generating voltage, gate-source leakage current, source-drain leakage current, etc., the back-end is to do to analyze a variety of After the different metal layers, will measure methods such as Metal resistance, Via resistance, MOM capacitance and other parameters.

Chip test methods

These tests can monitor the process fluctuations of the wafer fab, make timely adjustments, but also to solve the chip back to the key to the problem. As a simple example,failure analysis for the MOS transistor threshold voltage inside the wafer, the wafer manufacturer will set a lower limit according to the process requirements, and at the same time, set an acceptable upper and lower limit according to their own process capability, which represents the normal process fluctuation. If the overall parameters of a wafer are out of specification, the wafer will be removed from the wafer by the wafer fab or undergo special treatment, such as UV irradiation, to restore the performance. If a wafer is out of normal process fluctuation, the fab will include special characters on the lot to track whether the wafer meets the specification and whether the final tests performed during subsequent manufacturing meet the specification. If the test item is eventually offset, it can be determined whether the test item is related to the threshold voltage offset, and it also facilitates the assessment of the reliability of the wafer.

To summarize, WAT is mainly used to monitor process changes, facilitating fabs to make timely adjustments to process anomalies, and is also an important channel to find root causes when problems occur in chip final testing (FT).

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